Common mistake 17: These bus signals are all pulled by resistors, so I feel relieved.
Positive solution: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistor pulls a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be If the 244/245 isolated bus and other signals are pulled up, a few watts of power consumption will be consumed on these resistors (don’t use the concept of 80 cents per kilowatt-hour to treat these few watts of power consumption, the reason is down Look).
Common mistake 18: Our system is powered by 220V, so we don’t need to care about power consumption.
Positive solution: low-power design is not only for saving power, but also for reducing the cost of power modules and cooling systems, and reducing the interference of electromagnetic radiation and thermal noise due to the reduction of current. As the temperature of the device decreases, the life of the device is correspondingly extended (the operating temperature of a semiconductor device increases by 10 degrees, and the life is shortened by half). Power consumption must be considered at any time.
Common mistake 19: The power consumption of these small chips is very low, don’t worry about it.
Positive solution: It is difficult to determine the power consumption of the internally not too complicated chip. It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 mA without load, but its indicator is each pin. It can drive a load of 60 mA (such as matching a resistance of tens of ohms), that is, the maximum power consumption of a full load can reach 60*16=960mA. Of course, only the power supply current is so large, and the heat falls on the load.
Common mistake 20: How to deal with these unused I/O ports of CPU and FPGA? You can leave it empty and talk about it later.
Positive solution: If the unused I/O ports are left floating, they may become repeatedly oscillating input signals with a little interference from the outside world, and the power consumption of MOS devices basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have microampere current, so the best way is to set it as an output (of course, no other signals with driving can be connected to the outside).
Common Mistake 21: There are so many doors left on this FPGA, so you can use it.
Positive solution: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips, so the power consumption of the same type of FPGA at different circuits and different times may be 100 times different. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.
Common mistake 22: The memory has so many control signals. My board only needs to use the OE and WE signals. The chip select should be grounded, so that the data comes out much faster during the read operation.
Positive solution: The power consumption of most memories when the chip selection is valid (regardless of OE and WE) will be more than 100 times larger than when the chip selection is invalid. Therefore, CS should be used to control the chip as much as possible, and other requirements should be met. It is possible to shorten the width of the chip select pulse.
Common mistake 23: Reducing power consumption is the job of hardware personnel, and has nothing to do with software.
Positive solution: The hardware is just a stage, but the software is the performer. The access of almost every chip on the bus and the flip of every signal are almost controlled by the software. If the software can reduce the number of accesses to the external memory (using more register variables, More use of internal CACHE, etc.), timely response to interrupts (interrupts are often low-level active with pull-up resistors), and other specific measures for specific boards will all contribute greatly to reducing power consumption. For the board to turn well, the hardware and software must be grasped with both hands!
Common mistake 24: Why are these signals overshooting? As long as the match is good, it can be eliminated.
Positive solution: Except for a few specific signals (such as 100BASE-T, CML), there is overshoot. As long as it is not very large, it does not necessarily need to be matched. Even if it is matched, it does not necessarily match the best. For example, the output impedance of TTL is less than 50 ohms, and some even 20 ohms. If such a large matching resistance is used, the current will be very large, the power consumption will be unacceptable, and the signal amplitude will be too small to be used. Besides, the output impedance of the general signal when outputting high level and outputting low level is not the same, and it is also possible to achieve complete matching. Therefore, the matching of TTL, LVDS, 422 and other signals can be acceptable as long as the overshoot is achieved.