How to do the via and how to use the via on the PCB?

The via is one of the important components of multi-layer PCB, and the cost of drilling usually accounts for 30% to 40% of the cost of PCB board. Simply put, every hole on the PCB can be called a via.

The basic concept of the via:

From the point of view of function, the via can be divided into two categories: one is used as an electrical connection between the layers, and the other is used as a fixing or positioning of the device. If from the process, these holes are generally divided into three categories, namely blind holes, buried holes and through holes.

Blind holes are located on the top and bottom surfaces of the printed circuit board and have a certain depth for the connection of the surface circuit and the inner circuit below, and the depth of the holes usually does not exceed a certain ratio (aperture).

The buried hole refers to the connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the board. The above two types of holes are located in the inner layer of the circuit board, which is completed by the through hole molding process before lamination, and several inner layers may be overlapped during the formation of the through hole.

The third type is called through-holes, which pass through the entire circuit board and can be used to achieve internal interconnection or as installation positioning holes for components. Because the through hole is easier to achieve in the process and the cost is lower, the vast majority of printed circuit boards use it, rather than the other two through holes. The following holes, without special instructions, are considered as through holes.

From a design point of view, a via is mainly composed of two parts, one is the middle of the drilling hole, and the other is the welding pad area around the drilling hole. The size of these two parts determines the size of via.

Obviously, in high-speed, high-density PCB design, the designers always want the hole as small as possible, so that more wiring space can be left, in addition, the smaller the via, its own parasitic capacitance is smaller, more suitable for high-speed circuits.

However, the reduction of the via size also brings about an increase in costs, and the size of the hole cannot be reduced indefinitely, it is limited by drilling and electroplating technology: the smaller the hole, the longer the drilling takes, the easier it is to deviate from the center; When the depth of the hole is more than 6 times the diameter of the hole, it is impossible to ensure that the hole wall can be uniformly plated with copper.

For example, if the thickness (through hole depth) of a normal 6-layer PCB board is 50Mil, then the minimum drilling diameter that PCB manufacturers can provide under normal conditions can only reach 8Mil. With the development of laser drilling technology, the size of the drilling can also be smaller and smaller, and the diameter of the hole is generally less than or equal to 6Mils, we are called microholes.

Microholes are often used in HDI (high density interconnect structure) design, and microhole technology can allow the hole to be directly drilled on the pad, which greatly improves the circuit performance and saves the wiring space. The via appears as a breakpoint of impedance discontinuity on the transmission line, causing a reflection of the signal. Generally, the equivalent impedance of the hole is about 12% lower than the transmission line, for example, the impedance of a 50 ohms transmission line will be reduced by 6 ohms when it passes through the hole (specifically and the size of the via, the plate thickness is also related, not an absolute reduction).

However, the reflection caused by the impedance discontinuity via is actually very small, and its reflection coefficient is only:

(44-50)/(44 + 50) = 0.06

The problems arising from the via are more concentrated on the effects of parasitic capacitance and inductance.

Via’s Parasitic capacitance and Inductance

There is a parasitic stray capacitance in the via itself. If the diameter of the solder resistance zone on the laid layer is D2, the diameter of the solder pad is D1, the thickness of the PCB board is T, and the dielectric constant of the substrate is ε, the parasitic capacitance of the through hole is approximately:
C=1.41εTD1/(D2-D1)
The main effect of the parasitic capacitance on the circuit is to prolong the rise time of the signal and reduce the speed of the circuit.

For example, for a PCB with a thickness of 50Mil, if the diameter of the via pad is 20Mil (the diameter of the drilling hole is 10Mils) and the diameter of the solder resistance zone is 40Mil, then we can approximate the parasitic capacitance of the via by the above formula:

C=1.41×4.4×0.050×0.020/(0.040-0.020)=0.31pF 

The amount of rise time change caused by this part of the capacitance is roughly:

T10-90=2.2C(Z0/2)=2.2×0.31x(50/2)=17.05ps

It can be seen from these values that although the utility of the rise delay caused by the parasitic capacitance of a single via is not very obvious, if the via is used several times in the line to switch between layers, multiple holes will be used, and the design should be carefully considered. In the actual design, the parasitic capacitance can be reduced by increasing the distance between the hole and the copper area (Anti-pad) or reducing the diameter of the pad.

In the design of high-speed digital circuits, the harm caused by the parasitic inductance is often greater than the influence of the parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitor and weaken the filtering effectiveness of the whole power system.

We can use the following empirical formula to simply calculate the parasitic inductance of a through-hole approximation:

L=5.08h[ln(4h/d)+1]

Where L refers to the inductance of via, h is the length of via, and d is the diameter of the central hole. It can be seen from the formula that the diameter of the via has little influence on the inductance, while the length of the via has the greatest influence on the inductance. Still using the above example, the out-of-hole inductance can be calculated as:

L=5.08×0.050[ln(4x0.050/0.010)+1]=1.015nH 

If the rise time of the signal is 1ns, then its equivalent impedance size is:

XL=πL/T10-90=3.19Ω

Such impedance cannot be ignored in the presence of high-frequency current through, in particular, note that the bypass capacitor needs to pass through two holes when connecting the power layer and the formation, so that the parasitic inductance of the hole will be multiplied.

How to use the via?

Through the above analysis of the parasitic characteristics of the hole, we can see that in high-speed PCB design, seemingly simple holes often bring great negative effects to the design of the circuit. In order to reduce the adverse effects caused by the parasitic effect of the hole, the design can be as far as possible:

From the two aspects of cost and signal quality, choose a reasonable size of the via size. If necessary, you can consider using different sizes of vias, such as for power supply or ground wire holes, you can consider using a larger size to reduce the impedance, and for signal wiring, you can use a smaller via. Of course, as the size of the via decreases, the corresponding cost will also increase

The two formulas discussed above can be concluded that the use of a thinner PCB board is conducive to reducing the two parasitic parameters of the via

The signal wiring on the PCB board should not be changed as far as possible, that is to say, try not to use unnecessary vias.

Vias must be drilled into the pins of the power supply and the ground. The shorter the lead between the pins and the vias, the better. Multiple holes can be drilled in parallel to reduce the equivalent inductance.

Place some grounded through-holes near the through-holes of the signal change to provide the nearest loop for the signal. You can even place some excess ground holes on the PCB board.

For high speed PCB boards with high density, you can consider using micro-holes.